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IMSAI 8080 page 3 – 8080A

A new old CPU


I tracked down an IMSAI MPU-A card because the Z-80 just seemed too modern and flashy. After minimally testing the tantalum caps for shorts, I took a shot at powering the board up. It worked without any troubleshooting.

  • IMSAI MPU-A Rev. 4 - AMD 9080 purple ceramic CPU
Here's a test program in 8080 assembly as I become more familiar with the 8080 mnemonics. It's a simple counter for the programmed output LEDs on port FF. It uses the BC register pair for the pause between updates. While the code to check for BC = 0000 is more complicated than an equivalent nested loop (DCX B doesn't set the zero flag) this method is a few bytes shorter.


     1                                  ;; ============================
     2                                  ;; COUNTER
     3                                  ;; Binary counter
     4                                  ;; September 5, 2016
     5                                  ;;
     6                                  ;; 8080asm cross-assembler
     7                                  ;; 8080asm XX.asm -P -l
     8                                  ;; ============================
     9
    10            00 00                 ORG $0000h
    11  7    0000 16 FF                 MVI D,0FFh              ; Load complement of 00h into D
    12  5    0002 7A            DISPL:  MOV A,D                 ; 
    13 10    0003 D3 FF                 OUT,0FFh                ; send to port FF
    14 10    0005 01 FF FF              LXI B,0FFFFh            ; load BC with delay
    15  5    0008 0B            LOOP:   DCX B                   ; decrease B. this form b/c
    16  5    0009 78                    MOV A,B                 ;   dcx b does not set Z flag
    17  4    000A B1                    ORA C                   ; check if zero
    18 10    000B C2 08 00              JNZ LOOP                ; keep looping if not zero
    19  5    000E 15                    DCR D                   ; decrease display counter
    20 10    000F C3 02 00              JMP DISPL
    21                                  END

*******************************************************************************
                                 Symbols table
*******************************************************************************

Names           Types   Values
-----           -----   ------
DISPL           Label   00002h
LOOP            Label   00008h

n loops of 24 cycles + 40 cycles


Getting 8K of SRAM running


Now that I'm running the 8080, I wanted to fix the IMS 8K SRAM board. I filled the memory with a known byte sequence.

    14 10    0000 21 00 04        LXI H,0400h   ; Load start address
    15                          LOOP:   
    16  7    0003 3E FF           MVI A,0FFh    ; first run use FF, then 00
    17  7    0005 77              MOV M,A       ; (HL)<-A
    18  5    0006 23              INX H         ; HL<-HL+1
    19  5    0007 7C              MOV A,H       ; A<-H
    20  7    0008 FE 20           CPI 020h      ; at 8k?
    21 10    000A C2 03 00        JNZ LOOP      ; no, keep going
    22  7    000D 76              HLT

I found the following defects in the IMS 8K board by first filling memory with 00 then with FF.

0000 - ok
0400  - D00, D03, D06, D07 high  (CE0,D00) (CE0,D03) (CE0,D06) (CE0,D07) 
0800 - OK low, D01 stuck high (CE1,D01)
0C00  - ok
1000 - D01 stuck low (CE4,D01)
1400 - D00 low and high, D05 high (CE5,D00) (CE5,D05)
1800 - D01, D07 stuck high (CE6,D01) (CE6,D07)
1C00  - D04 low, D02 high, D00 h/l (CE7,D00) (CE7,D02) (CE7,D04) 

I consolidated what I hoped was the good RAM into the lower 1K banks and replaced the "bad" CE7 and several CE6 chips with 2102 chips sourced from a spare parts board. This process got it "working," but because I was only testing at the first address of each page, I missed some sticky bits. Two persistent failures were in the CE1 bank (0400-07FF) that would fail on bit 3 at addresses ending in "F". Another was the CE7 bank that failed on bit 7, again when ending in "F". The CE1 bank was finally fixed by just replacing the D03 2102 chip. The CE7 was more puzzling. Sometimes bit 7, which was stuck high, would turn low. This led me to believe that the N8T97 buffer on the data lines was bad (but why only for CE7?) Another possibility was the 138 decoder on the high address lines.

I switched out the 74LS138 and N8T97. That seemed to work. I ended up replacing the original 138, but a kept the 74367 installed instead of the N8T97. The board works with all 8K now and passed multiple runs of the memory test below. Later, I returned the original N8T97 and the board functioned fine. Maybe it was the errant 2102 or maybe pulling the 138 and N8T97 in and out a few times established better contacts.

The following program is a useful memory exerciser from the ExpandoRAM II manual, which was in turn adapted from T. E. Travis' program in the December 1976 issue of Interface Age. I found that a helpful change is to make the JMP LOOP to JNZ LOOP (C3 to C2) on line 33. The program will run once through and halt. After a successful run, the value at PATRN should be 02 and the address stored at BYTE should be 00 02.

     1                                  ;; ================================================
     2                                  ;; Address storage test with incrementing pattern
     3                                  ;; From ExpandoRAM II manual
     4                                  ;; Translated from DEC 1976 Interface Age 
     5                                  ;;
     6                                  ;; asm8080 cross-assembler
     7                                  ;; asm8080 XX.asm -P -l
     8                                  ;; ================================================
     9
    10            00 00                 ORG 0000h
    11                                  
    12  7    0000 06 00                 MVI B,000h              ; initial pattern modifier
    13 10    0002 21 2F 00      LOOP:   LXI H,START             ; starting address for check
    14                                  ;; LOAD UP MEMORY
    15  5    0005 7D            FILL:   MOV A,L 
    16  4    0006 AC                    XRA H
    17  4    0007 A8                    XRA B
    18  7    0008 77                    MOV M,A                 ; store pattern
    19  5    0009 23                    INX H                   ; next memory address
    20  5    000A 7C                    MOV A,H                 ; high byte of address
    21  7    000B FE 20                 CPI 020h                ; check for stop address
    22 10    000D C2 05 00              JNZ FILL
    23                                  ;; READ AND CHECK
    24 10    0010 21 2F 00              LXI H,START
    25  5    0013 7D            TEST:   MOV A,L
    26  4    0014 AC                    XRA H
    27  4    0015 A8                    XRA B
    28  7    0016 BE                    CMP M                   ; compare to (HL)
    29 10    0017 C2 25 00              JNZ EXIT                ; error exit
    30  5    001A 23                    INX H                   ; next memory address in (HL)
    31  5    001B 7C                    MOV A,H                 ; high byte of address
    32  7    001C FE 20                 CPI 020h                ; check for stop address
    33 10    001E C2 13 00              JNZ TEST                ; keep looping if not stop
    34  5    0021 04                    INR B                   ; update pattern modifier
    35 10    0022 C3 02 00              JMP LOOP                ; run again with new modifier
    36 16    0025 22 2D 00      EXIT:   SHLD BYTE               ; save error address
    37 13    0028 32 2C 00              STA PATRN               ; save bad pattern
    38  7    002B 76                    HLT                     ; notify user
    39                                  ;;
    40       002C               PATRN:  DB 00
                  00 
    41       002D               BYTE:   DB 00,00
                  00 00 
    42                          START:
    43                                  END



*******************************************************************************

                                 Symbols table

*******************************************************************************


Names           Types   Values

-----           -----   ------

LOOP            Label   00002h

FILL            Label   00005h

TEST            Label   00013h

EXIT            Label   00025h

PATRN           Label   0002Ch

BYTE            Label   0002Dh

START           Label   0002Fh



While I'm fiddling around with 8080 assembly, it's interesting to see the differences between late 70's microprocessor architectures. The RST operation was surprising. The design and use of the I/O ports is also intriguing, coming from more experience with memory-mapped I/O in old microcomputers. I'm beginning to get a clearer picture of the I/O and memory addressing.


Well, now I have an 8080 microcomputer with 8K of RAM. And that's it. It's just me, the front panel, the processor, and some memory—personal computing like it's 1975. My IMSAI sang Daisy Bell, just like Steve Dompier's ALTAIR. And although toggling machine code in is a character building activity, I'm going to work on getting some serial I/O up and running.


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